A faster, cheaper method for making transistors and chips

It may soon be possible to manufacture the miniscule structures that make up transistors and silicon chips rapidly and inexpensively. EPFL scientists are currently investigating the use of dynamic stencil lithography, a recent but not yet perfected method, for creating nanostructures.

Faster, less expensive, and better. These are the advantages of dynamic stencil lithography, a new way of fabricating nanostructures, such as the tiny structures on transistors and silicon chips.

The principle of the "stencil" technique for making structures at the nanometer scale (a millionth of a millimeter) is simple: a substrate – a Silicon (Si) wafer or flexible plastics – is placed in an evaporator. On top of it stands a stencil with openings, called apertures, about 100-200 nanometers in size. During the metal evaporation, the stencil acts like a mask, and only the metal that passes through the apertures lands on the substrate. It is thus possible to locally deposit metal on the substrate in a very specific pattern. This precision is essential for the transistors or other electronic components made up of these structures to function properly. "Take a piece of paper, cut a circle out of the middle. Put the rest of the paper against the wall, spray the whole thing with paint, and then remove the stencil. You have a nice circle. This is essentially the principle we’re using," says Veronica Savu, who works in EPFL’s Microsystems Laboratory, led by Professor Juergen Brugger. "Using stencils to make something isn’t new. Just look at prehistoric cave paintings where people used their hands as a stencil", she continues. "But to be able to do it at such a tiny scale is a real scientific challenge."

And Savu has already taken on the challenge. Her research was highlighted on the cover of the scientific journal Nanoscale this summer. She has also recently won a grant from the Swiss National Science Foundation to continue her work. She is not satisfied with lithography that uses a static stencil, such as was described above, because it imposes several limitations; obtaining different patterns from a single stencil is impossible, for example. She’s interested in dynamic stencil lithography (DSL), a novel process that enables custom designs using the same stencil.

"With a single aperture, our stencil can be moved during metal evaporation, and can draw several different two-dimensional patterns in a single operation, such as a square, a circle, a line or a cross. It’s like writing a text with a pencil," she explains. "We have also proven that it is possible to use this method on a 100 mm-diameter substrate, the standard size used in industry." Up to this point, no one has managed to do everything that’s needed to apply DSL at nanoscale in the real world. "We knew about DSL, about sub-micrometer size stencil openings, and about the use of stencils on industrial-size silicon samples. But nobody had yet been able to bring all those elements together in a single method."

Static or dynamic stencil lithography could thus eventually be used in industry, replacing the traditional so-called "resist-based" nanolithography methods. Those are complicated and expensive processes that involve deposing the metal directly on the substrate and then spin-coating the substrate with a layer of a viscous solution, called a resist. An electron beam writer, a piece of specialized machinery that costs several million dollars, uses an nanometer focused beam to carve patterns in the resist layer. A chemical solvent is then applied, and only the exposed parts of the resist remain on the substrate, acting like a mask. The metal remaining on the substrate that is not protected by the resist mask is then chemically removed. Finally the resist itself is stripped away, leaving the patterned metal deposits behind. "This method is a lot more complicated and more time-consuming than stencil lithography," comments Savu. An added benefit of stencil lithography is a reduced risk of contamination to sensitive substrates like graphene or ther organic materials, as no solvents or resists are used. "The use of stencils in the static mode represents a democratization of nanolithography – no need for expensive machinery, just a stencil and an evaporator," adds Professor Brugger.

If it can prove reliable, the stencil technique may well be adopted for industrial applications. Meanwhile, smart microengineering and material science concepts are being used to overcome the current limitations of this technique. One serious problem with both static and dynamic stencil lithography is that the apertures through which the metal deposition takes place tend to get clogged. In the article, Savu and Xie show how embedding heaters in the stencil membranes prevents the material from being accumulated on the apertures, a solution transferred into a pending patent. But tests are still being done to thoroughly characterize the effects of the heat application on the stencil and on the structured patterns.

"We are going to collaborate with the Nanoscience Center at the University of Basel to do tests that are needed to prove a real application of dynamic stencil lithography," she explains. "The goal is to eventually make functional transistors, possibly using graphene or nanowires, like we’ve already done with static stencil lithography."

Veronica Savu obtained a BS in physics at the California Institute of Technology (Caltech), and earned a PhD at Yale University. She is currently working as a post-doctoral researcher in the laboratory of EPFL Professor Juergen Brugger.

Publication : 100 mm dynamic stencils pattern sub-micrometre structures

Laure-Anne Pessina