Prof. Christian Enz

Full Professor

Christian C. Enz (M’84, S'12) received the M.S. and Ph.D. degrees in Electrical Engineering from the EPFL in 1984 and 1989 respectively. From 1984 to 1989 he was research assistant at the EPFL, working in the field of micro-power analog IC design. In 1989 he was one of the founders of Smart Silicon Systems S.A. (S3), where he developed several low-noise and low-power ICs, mainly for high energy physics applications. From 1992 to 1997, he was an Assistant Professor at EPFL, working in the field of low-power analog CMOS and BiCMOS IC design and device modeling. From 1997 to 1999, he was Principal Senior Engineer at Conexant (formerly Rockwell Semiconductor Systems), Newport Beach, CA, where he was responsible for the modeling and characterization of MOS transistors for the design of RF CMOS circuits. In 1999, he joined the Swiss Center for Electronics and Microtechnology (CSEM) where he launched and lead the RF and Analog IC Design group. In 2000, he was promoted Vice President, heading the Microelectronics Department, which became the Integrated and Wireless Systems Division in 2009. He joined the EPFL as full professor in 2013, where he is currently the director of the Institute of Microengineering (IMT) and head of the Integrated Circuits Laboratory (ICLAB).

He is lecturing and supervising undergraduate and graduate students in the field of Analog and RF IC Design at EPFL. His technical interests and expertise are in the field of very low-power analog and RF IC design, semiconductor device modeling, and inexact and error tolerant circuits and systems.

He has published more than 200 scientific papers and has contributed to numerous conference presentations and advanced engineering courses. Together with E. Vittoz and F. Krummenacher he is one of the developer of the EKV MOS transistor model and the author of the book "Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design" (Wiley, 2006). He has been member of several technical program committees, including the International Solid-State Circuits Conference (ISSCC) and European Solid-State Circuits Conference (ESSCIRC). He has served as a vice-chair for the 2000 International Symposium on Low Power Electronics and Design (ISLPED), exhibit chair for the 2000 International Symposium on Circuits and Systems (ISCAS) and chair of the technical program committee for the 2006 European Solid-State Circuits Conference (ESSCIRC). Since 2012 he has been elected as member of the IEEE Solid-State Circuits Society (SSCS) Administrative Commmittee (AdCom). He is also Chair of the IEEE SSCS Chapter of Switzerland.


Research Area

1) Semiconductor device modeling

Following the development of the EPFL-EKV MOS transistor model (PhD of M. Bucher), we have investigated some fundamental issues on compact noise modeling of nanoscale bulk and double-gate MOS transistors (PhD of A.S. Roy). Another topic of interest is the development of a new compact model of organic devices.

2) Analog and RF IC Design

We are exploring how the analog-to-digital converter (ADC), which remains one of the most power hungry block in a digital RF receiver, can be replaced by a phase-ADC taking advantage of a direct quantization of the phase for constant envelope modulations (PhD candidate B. Banerjee).

After having investigated the use of high-Q bulk acoustic wave (BAW) resonators in the receiver part of an RF transceiver (PhD of J. Chabloz), we now are looking at how BAW resonators can be used in the transmitter and particularly in the power amplifier (PhD candidate M. Contaldo).

Another research topic that started recently is about the use of sampled radio for the implementation of ultralow-power RF transceivers. We are investigating whether the sampling radio architectures that were recently developped for cellular, WLAN and Bluetooth applications can be applied for ultralow-power RF transceivers for WSN applications (PhD candidate A. Heragu).

Finally, we are also looking at the design of a flexible sensor interface for in-vivo drug delivery systems using an asynchronous ADC with companding, avoiding the need of any clock and allowing for extending the dynamic range (DR), keeping an almost constant signal-to-noise ratio (SNR) (PhD candidate V. Balasubramanian).


Christian ENZ
MC A4 303
Station 11
1015 Lausanne